Memory configuration including a plurality of resistive ferroelectric memory cells

摘要

A memory configuration includes a plurality of resistive ferroelectric memory cells. Each of the memory cells includes a selection transistor and a storage capacitor. The selection transistor has a given zone of a first conductivity type. The storage capacitor has a first and a second electrode. The first electrode is supplied with a fixed cell plate voltage, the second electrode is connected to the given zone of the first conductivity type. A source and a drain of a MOS transistor are supplied with the fixed cell plate voltage. The channel of the MOS transistor has a channel length extending over at least two of the memory cells. The given zone of the first conductivity type is connected, via a resistor, to the channel of the MOS transistor such that the given zone is electrically connected to the first electrode of the storage capacitor via the resistor and the MOS transistor.