发明名称 |
Nonvolatile semiconductor memory device having a hierarchial bit line structure |
摘要 |
A nonvolatile semiconductor memory device comprising a plurality of memory cells each having a transistor including a floating gate electrode as a constituent are arranged on a silicon substrate in a matrix, wherein bit lines have hierarchical structures and comprise at least a main bit line 1 and a sub-bit line 2, and a plurality of sub-bit line selection transistors 4 provided between the main bit line 1 and sub-bit line 2 which transistor 4 are respectively selectively activated depending on given row address lines, wherein a voltage applied to each gate electrode of the sub-bit line selection transistor 4 which is selected and activated when data is erased from or written on each memory cell is rendered the same as that applied to each gate electrode of the sub-bit line selection transistor 4 which becomes non-activated when not selected.
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申请公布号 |
US6307786(B1) |
申请公布日期 |
2001.10.23 |
申请号 |
US20000652040 |
申请日期 |
2000.08.31 |
申请人 |
OKI ELECTRIC INDUSTRY CO., LTD. |
发明人 |
OGANE JUNICHI |
分类号 |
G11C16/06;G11C16/08;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/04 |
主分类号 |
G11C16/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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