| 摘要 |
PURPOSE: An ESD(Electro Static Discharge) protection circuit and a method for manufacturing the same are provided to decrease a triggering voltage of an FPD(Field Plate Diode). CONSTITUTION: An N-well(202) and a P-well(203) are formed in a p-type substrate(201). A p+ first impurity region(204) is formed in the P-well(203). An FPD comprises an n+ second impurity region(205), an n+ third impurity region(206) used as source/drain and a gate electrode(210). A p+ fourth impurity region(207) is formed in the N-well(202) and an n+ fifth impurity region(208) is formed at side of the p+ fourth impurity region(207). A deep N-well(211) is formed between the P-well(203) and the substrate(201). The p+ first impurity region(204), the n+ second impurity region(205) and the gate electrode(210) are electrically connected to a ground(GND) or Vss. Also, the p+ fourth impurity region(207) and the n+ fifth impurity region(208) are connected to a pad(209).
|
