| 摘要 |
Current sense amplifiers with hysteresis are provided which conserve scarce chip surface area yet still provide fast response times in a low power CMOS environment. A first embodiment includes a first amplifier and a second amplifier which are electrically coupled. Each amplifier includes a first transistor of a first conductivity type and a second transistor of a second conductivity type, where the first and second transistors are coupled at a drain region. A signal input node is coupled to a source region of the first transistor in each amplifier. A signal output node is coupled to the drain region of the first and the second transistors in the second amplifier. The signal output node is further coupled to a gate of a third transistor in order to introduce hysteresis into the current sense amplifier. Integrated circuits, electrical systems, methods of operation and methods of forming the novel current sense amplifier are similarly included.
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