| 摘要 |
A fractional-N type frequency synthesizer (700) for use in a radiotelephone (901). The synthesizer (700) utilizes multiple latched accumulators (401, 403, 405, 407), within an accumulator network, to perform multiple integrals of an input signal (439). The outputs of the accumulators are combined in series to form a data output signal (453). The data output signal (453) is input to a divider network (703) and used as a variable divisor of the frequency input from a variable oscillator (701) into the divider network (703). |
