发明名称 |
Method for fabricating a memory cell |
摘要 |
A method for producing a storage cell includes forming a polycrystalline silicon layer on a semiconductor body having at least one selection transistor disposed in a first plane. An interspace is formed between two adjacent structures of the layer and one of the adjacent structures of the layer is placed on a surface of a first silicon plug. A cell plate electrode is formed in the interspace and a trench is formed in the layer. The trench reaches as far as the first plug surface and is filled with an insulating layer. The layer is removed. A storage capacitor having a high-epsilon or ferroelectric dielectric and a storage node electrode is formed. The capacitor is disposed in a second plane in and above the body. The insulating layer is replaced with silicon to form a second silicon plug directly connected to the first plug. The second plug is electrically connected to the storage node electrode, and the first plane is electrically connected to the second plane through the first and second plugs.
|
申请公布号 |
US2001031529(A1) |
申请公布日期 |
2001.10.18 |
申请号 |
US20010773218 |
申请日期 |
2001.01.31 |
申请人 |
HOFMANN FRANZ;KRAUTSCHNEIDER WOLFGANG;SCHLOSSER TILL;WILLER JOSEF |
发明人 |
HOFMANN FRANZ;KRAUTSCHNEIDER WOLFGANG;SCHLOSSER TILL;WILLER JOSEF |
分类号 |
H01L27/105;H01L21/02;H01L21/8242;H01L21/8246;H01L27/108;(IPC1-7):H01L21/824 |
主分类号 |
H01L27/105 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|