| 摘要 |
A high-speed turbo decoder utilizes a MAP decoding algorithm and includes a streamlined construction of functional units, or blocks, amenable to ASIC implementation. A gamma block provides symbol-by-symbol a posteriori state transition probability estimates. Two gamma probability function values are provided via selection switches to the alpha and beta blocks for calculating the alpha and beta probability function values, i.e., performing the alpha and beta recursions, respectively, in parallel, thus significantly increasing decoding speed. A scaling circuit monitors the values of the alpha and beta probability functions and prescribes a scale factor such that all such values at a trellis level remain within the precision limits of the system. A sigma block determines the a posteriori state transition probabilities (sigma values) and uses the sigma values to provide soft-decision outputs of the turbo decoder.
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