发明名称 CLOCK CHANGER
摘要 <p>PROBLEM TO BE SOLVED: To provide a clock changer which executes the control for gradually increasing the frequency of a clock applied a high current consumption type semiconductor device and the control for gradually decreasing the clock frequency in testing the semiconductor device which has a high clock frequency in a regular operation and consumes a high current in the regular operation. SOLUTION: The clock changer is composed of a clock generator for generating clocks covering all frequencies required for a semiconductor device and a selector circuit for selecting and outputting the clock generated by the clock generator. Further, the clock changer comprises a synchronizing circuit for generating a switching control signal synchronized with each clock, and a gate circuit constituting the selector circuit is controlled according to the switching control signal synchronized with each clock obtained by the synchronizing circuit.</p>
申请公布号 JP2001284531(A) 申请公布日期 2001.10.12
申请号 JP20000090991 申请日期 2000.03.29
申请人 ADVANTEST CORP 发明人 WATANABE HIROYOSHI
分类号 G01R31/28;G06F1/04;G06F1/06;H01L21/822;H01L27/04;H03K5/00;H03K17/00;(IPC1-7):H01L27/04 主分类号 G01R31/28
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