发明名称 |
Analog-to-digital converter circuit e.g. for computer tomograpy has logic circuit which detects number of times charge is removed from integrating capacitor |
摘要 |
The circuit includes an operational amplifier (46) with an integrating capacitor (44). A charge subtracting circuit (36) is selectively coupled to the inverting input (47) and the output (49) of the operational amplifier. A digital logic circuit (66) tracks the number of times a charge is removed from the integrating capacitor by the charge subtraction circuit. A residue quantization circuit detects a residual charge in the integrating capacitor, and provides an additional output bit accordingly. Independent claims are included for further analog-digital converter circuits and a method of converting an analog input signal into a number of binary output bits.
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申请公布号 |
DE10117689(A1) |
申请公布日期 |
2001.10.11 |
申请号 |
DE20011017689 |
申请日期 |
2001.04.09 |
申请人 |
GENERAL ELECTRIC CO., SCHENECTADY |
发明人 |
RAO, NARESH KESAVAN;HARRISON, DANIEL DAVID;MCGRATH, DONALD THOMAS;TIEMANN, JEROME JOHNSON |
分类号 |
H03M1/44;H03M1/14;H03M1/52;(IPC1-7):H03M1/12 |
主分类号 |
H03M1/44 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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