| 摘要 |
A delta-sigma modulator comprises a 1-bit quantizer located for quantizing an analog signal applied thereto, and for outputting a first quantized digital signal, a 1-bit DA converter converting the first quantized digital signal into a quantized analog signal, a subtracting circuit for subtracting the quantized analog signal output from the 1-bit DA converter from the analog signal input to the 1-bit quantizer, and an input integrating circuit series including a series of one or more stages each of which includes a subtracter and an integrator for integrating an output of the subtracter, one subtracter at a first stage subtracting the quantized analog signal delayed by a delay element from an input analog signal input to the delta-sigma modulator, and one integrator at a final stage outputting its output to the 1-bit quantizer. A multiple-bit quantizer quantizes an analog output of the subtracting circuit and outputs a second quantized digital signal. A differentiator then calculates an Nth-order derivative of the second quantized digital signal from the multiple-bit quantizer, N being equal to a number of the one or more stages included in the input integrating circuit series, and an adder adds an output of the differentiator to the first quantized digital signal from the 1-bit quantizer.
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