发明名称 Semiconductor device and method of manufacturing the same
摘要 When a wiring conductor is formed on a semiconductor substrate, a via-hole or a trench is formed by directly performing electroless plating on a barrier layer containing a very small depressed portion such as the via-hole or the trench in an insulator layer without using a dry metallized method or a substitutive plating method.The semiconductor device is provided with an insulator layer having a via-stud on a semiconductor substrate, the via-stud being formed in a via-hole through a barrier layer formed of an inorganic compound layer or a high melting point metal layer formed on an inner surface of the via-hole, the via-stud being made of the same metal as a metal composing the barrier layer. The semiconductor device can be obtained by forming the barrier layer on the inner surface of the via-hole in the semiconductor substrate, then treating the substrate with a treatment solution containing a complex forming agent, immersing the treated substrate into an electroless plating solution, bringing a member made of the same metal as a metal formed by the electroless plating in contact with the electroless plating solution, and electrically connecting the member to the barrier layer to perform electroless plating.
申请公布号 US6300244(B1) 申请公布日期 2001.10.09
申请号 US19990317955 申请日期 1999.05.25
申请人 HITACHI, LTD. 发明人 ITABASHI TAKEYUKI;HABA TOSHIO;AKAHOSHI HARUO
分类号 C23C18/54;H01L21/48;H01L23/498;H01L23/522;H01L23/532;(IPC1-7):H01L21/24;H01L21/476;B01D57/02;C25D5/02;B05D5/12 主分类号 C23C18/54
代理机构 代理人
主权项
地址