发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To realize large current, reduce consumption power and restrain increase of gate resistance due to thin wire effect of a gate electrode, in a fine MOS transistor. SOLUTION: A second gate electrode 7, having an eaves structure is formed on a side surface of a first gate electrode 3, which regulates effective channel length. By using oblique ion implantation, which uses the second gate electrode 7 as an ion implantation obstructing mask, a pocket structure impurity region, having impurity distribution whose concentration is low in a channel region on the surface of a semiconductor substrate 1 and high in the substrate, is formed. The first gate electrode 3 and the second gate electrode 7 are connected by using a metal silicide film in the upper part of the gate electrode. Thereby a large current can be realized, while a punch-through phenomenon is restrained, and restraint of tunnel leakage current in a drain junction end, i.e., restraint of consumption power at the time of waiting can be also realized. Furthermore, increase of gate electrode resistance which is caused by thin wire effect of the gate electrode is restrained, and high-speed operation can be realized.
申请公布号 JP2001267562(A) 申请公布日期 2001.09.28
申请号 JP20000077803 申请日期 2000.03.15
申请人 HITACHI LTD 发明人 HORIUCHI KATSUTADA
分类号 H01L21/28;H01L21/336;H01L29/423;H01L29/43;H01L29/49;H01L29/78;H01L29/786;(IPC1-7):H01L29/78 主分类号 H01L21/28
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