| 摘要 |
The cell density of power MOSFET used as a switch is determined by the width of the trench formed in the device, the processing limit of which is limited by the spatial resolution of the exposure apparatus used in the photolithographic process. This invention provides a method of manufacturing such devices which overcomes the processing limitation imposed by the exposure apparatus, and doubles the cell density and reduces the input capacitance for further reducing the on-state resistance and improving the switching speed. By forming a second CVD oxide film over a first oxide film defining the opening for forming a trench and subsequent anisotropic RIE etching of the second film, a side-wall film is added to the mask pattern, which promotes a further reduction of the width of the trench by more than one half.
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