发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device where a dummy pattern is formed and a data rate can be adjusted, without having to generate parasitic capacitance in an internal region. SOLUTION: A semiconductor integrated circuit device, which has a multilayer wiring structure constituted of plural wiring layers and in which a pad 11 is arranged at the periphery of an internal region in the center of a chip surface 10a, is provided with a dummy pattern 13 in a layer, which excludes the inner area and from which a metal layer constituting the pad is removed.
申请公布号 JP2001267319(A) 申请公布日期 2001.09.28
申请号 JP20000081540 申请日期 2000.03.23
申请人 NEC CORP 发明人 YAMAGUCHI MASAYA
分类号 H01L23/52;H01L21/3205 主分类号 H01L23/52
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