发明名称 Method for producing a vertical MOS transistor
摘要 A first part (S/D1a) of a first source/drain region (S/D1) is disposed on at least one flank of a semiconductor structure (St) and on at least one peripheral region of a surface (OH), bordering the flank, of the semiconductor structure (St). A dimension of the first part (S/D1a) of the first source/drain region (S/D1) perpendicular to the flank is less than an analogous dimension of the semiconductor structure (St) and than the minimum feature size that can be made by the technology used. For the production, a mask that is used to create the semiconductor structure (St) can be reduced in size for the implantation of the first part (S/D1a) of the first source/drain region (S/D1). To make it easier to create a contact (K1) of the first source/drain region (S/D1), a second part (S/D1b) of the first source/drain region (S/D1) can be disposed in an inner region of the surface (OH) of the semiconductor structure (St). A dimension of the second part (S/D1b) of the first source/drain region (S/D1) perpendicular to the surface (OH) of the semiconductor structure (St) is smaller than an analogous dimension of the first part (S/D1a) of the first source/drain region (S/D1).
申请公布号 US2001024858(A1) 申请公布日期 2001.09.27
申请号 US20010843584 申请日期 2001.04.26
申请人 INFINEON TECHNOLOGIES AG 发明人 SCHULZ THOMAS;AEUGLE THOMAS;ROESNER WOLFGANG
分类号 H01L29/41;H01L21/336;H01L29/78;(IPC1-7):H01L21/336 主分类号 H01L29/41
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