HIGH-SPEED MAXIMUM A POSTERIORI (MAP) ARCHITECTURE WITH OPTIMIZED MEMORY SIZE AND POWER CONSUMPTION

摘要

A maximum-a-posteriori (MAP) decoding architecture for turbo-codes comprising a plurality of forward and backward recursion units for producing forward and backward likelihood signals ( delta , epsilon ) and combining them for the determination of log-likelihood ratios (LLR LAMBDA ). The architecture is adapted to turbo-codes based on recursive systematic component codes (RSC) by the provision of an additional input at the LLR computing recursion units for the input of state transition likelihood values ( mu ).