| 摘要 |
PURPOSE: A device for the DMA(Direct Memory Access) having a function of an operation is provided to reduce a total operating time by performing the data operation during the data transfer cycle. CONSTITUTION: A DMA register bus I/F(Interface)(602) is the interface for the data I/O(Input/Output) between a MCU(Micro Controller Unit) inner bus(622) and the DMA(600). A data register(604) stores the data inputted from the MCU inner bus. A channel(606) generates a source or destination address according to the operation mode or state of the DMA. A DMA control register(608) stores the control values(START/STOP) necessary to DMA control. A channel control register(610) stores the control values necessary to channel control. A channel·DMA·operating controller(612) control the channel, an address multiplexer(614), DMA operating register(616), DMA operator(618), and operating result register(620). The address multiplexer selectively outputs the source or destination address which is output from each channel. The DMA operating register stores the data which will be operated at the inside of the DMA. The DMA operator performs the operation of the data delivered from the DMA. The operating result register stores the operating result of the DMA operator.
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