发明名称 Integrated method for etching of BLM titanium-tungsten alloys for CMOS devices with copper metallization
摘要 Form a solder connector on a semiconductor device starting with a first step of forming at least one dielectric layer over a doped semiconductor substrate. Then form a hole through the dielectric layer down to the semiconductor substrate. Form a metal conductor in the hole. Form intermediate layers over the metal conductor and the dielectric layer. Then form a tapered opening down to the surface of the metal conductor. Form BLM layers including a titanium-tungsten (TiW) layer over the metal conductor and the dielectric layer with the remainder of the BLM layers being formed over the TiW layer. Form a mask over the top surface of the BLM layers with a patterning through hole located above the metal conductor exposing a portion of the surface of the BLM layers. Plate a C4 solder bump on the BLM layers in the patterning hole. Remove the mask. Wet etch away the BLM layers aside from the solder bump leaving a residual TiW layer over the dielectric layer. Perform a dry etching process to remove the residual TiW layer aside from the solder bump. Then, end the dry etching when the end point has been reached. Finally, heat the solder bump in a reflow process to form a C4 solder ball.
申请公布号 US6293457(B1) 申请公布日期 2001.09.25
申请号 US20000590119 申请日期 2000.06.08
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 SRIVASTAVA KAMALESH K.;GRIFFITH JONATHAN H.;CULLINAN-SCHOLL MARY C.;BREARLEY WILLIAM H.;WADE PETER C.
分类号 C23F1/26;H01L21/60;H01L21/768;H01L23/485;(IPC1-7):B23K31/02;B23K31/10 主分类号 C23F1/26
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