| 摘要 |
PROBLEM TO BE SOLVED: To provide software simulation technique of hardware using a pipeline. SOLUTION: The hardware is modeled to models of plural pipeline circuit elements, the models of each pipeline circuit element read a value of inputted data from a first data storage area A and write a value of outputted data in a second data storage area B. The first data storage area A is replaced with the second data storage area B at a point of completion of each clock signal cycle to be simulated and operations to transfer signals among pipeline stages 8, 10, 12 in the pipelines 16, 18 of the hardware are efficiently repeated.
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