发明名称 LOGICAL EMULATION PROCESSOR AND ITS MODULE UNIT
摘要 PROBLEM TO BE SOLVED: To increase the speed of logical emulation by reducing the number of stages of a digital circuit model and expanding band width of data transfer between LSIs. SOLUTION: This logical emulation system is driven by software and constituted of a combination circuit processor to emulate a combination circuit model or a memory model, plural control processors to mainly emulate an sequence order circuit model and to provide the combination circuit with an input signal and plural multiplexers to select plural outputs of the combination circuit processor and to output them to the control processors.
申请公布号 JP2001249824(A) 申请公布日期 2001.09.14
申请号 JP20000061838 申请日期 2000.03.02
申请人 HITACHI LTD;HITACHI INFORMATION TECHNOLOGY CO LTD 发明人 TOMITA HIROSHI
分类号 G06F17/50;G06F9/455;G06F11/22;G06F11/26 主分类号 G06F17/50
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