RECEIVER FOR DIGITAL VOICE COMMUNICATION SYSTEM

摘要

PROBLEM TO BE SOLVED: To provide a receiver that can receive both a signal of the FDM-DPSK system and a signal of the 16QAM system and reduce the frame synchronization locking time of the 16QAM system. SOLUTION: A demodulation processing circuit 7 applies demodulation processing to data of an L channel resulting from digitizing the output of an AGC circuit 1 for the FDM-DPSK having a small time constant to quicken establishment of frame synchronization when receiving a 16QAM signal and no frame synchronization is established. Then the circuit 7 applies demodulation processing to data of an R channel resulting from digitizing the output of an AGC circuit 2 for the 16QAM having a large time constant once the frame synchronization is established.