发明名称 Data monitor circuit
摘要 Address information that is desired to be monitored of a data storage memory is stored in a data memory address buffer 110, and while a program is being executed the stored address information and address information transferred to a bus are compared. If there is coincidence between the stored address information and the address information transferred to the bus, data that has been transferred to the bus (data that has been read or written based on coincident address information) can be reliably output to the outside. As a result, it is possible to reliably carry out defect analysis for a data storage memory while a program is being executed.
申请公布号 US6289470(B1) 申请公布日期 2001.09.11
申请号 US19980192593 申请日期 1998.11.17
申请人 WILMINGTON TRUST COMPANY 发明人 TANAKA TOSHIYUKI
分类号 G06F12/16;G06F11/30;G06F11/34;G11C29/02;G11C29/38;(IPC1-7):G06F11/00 主分类号 G06F12/16
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