发明名称 BARRIER LAYER FOR FERROELECTRIC CAPACITOR INTEGRATED ON SILICON
摘要 A ferroelectric cell in which a ferroelectric stack (44) of a perovskite ferroelectric sandwiched by cubic perovskite metal-oxide conductive electrod es (50, 56) are formed over a silicon body, such as a polysilicon plug (42) penetrating a field oxide (40) over a silicon transistor (34). According to the invention, an oxidation barrier (46) is placed between the lower metal- oxide electrode and the polysilicon. The oxidation barrier may be: a refractory metal sandwiched between two platinum layers which forms a refractory oxide in a platinum matrix; an intermetallic barrier beneath a platinum electrode, e.g., of NiAl; or a combination of Ru and SrRuO3 or similar materials. Thereby, the polysilicon plug is protected from oxidation .
申请公布号 CA2225681(C) 申请公布日期 2001.09.11
申请号 CA19962225681 申请日期 1996.06.24
申请人 BELL COMMUNICATIONS RESEARCH, INC. 发明人 RAMESH, RAMAMOORTHY
分类号 H01L21/8247;H01B12/00;H01L21/02;H01L21/8242;H01L21/8246;H01L27/06;H01L27/10;H01L27/105;H01L27/108;H01L29/788;H01L29/792;(IPC1-7):H01L27/115 主分类号 H01L21/8247
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