| 摘要 |
A sense amplifier is provided which is easy to sense small signal voltage levels from microstructured memory cells and is suitable for use with high-speed, high-packing-density DRAMs. The sense amplifier has a CMOS flip-flop circuit which is connected to a complementary pair of bit lines and composed of a pair of PMOS transistors and a pair of NMOS transistors. The pairs of PMOS and NMOS transistors each have their common sources connected to a trench or stacked capacitor of three-dimensional structure as auxiliary capacitance for cell capacitance. When a memory cell is selected through a word line, a sense operation is performed which discharges charges on the source capacitors to the paired bit lines. In the sense amplifier, a positive feedback circuit is formed by a PMOS transistor and an NMOS transistor that are conducting in the CMOS flip-flop circuit, which allows a smooth transition from a sense operation to a restore operation.
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