发明名称 FET BIAS CIRCUIT
摘要 PROBLEM TO BE SOLVED: To prevent a bias point from fluctuating on gate current fluctuation caused by an input signal level or temperature change and further to operate an FET in all A, AB and B classes. SOLUTION: A gate bias voltage Vgsdc of the FET is compared with a reference voltage by an operational amplifier A and closed loop control is applied to the gate bias voltage Vgsdc of the FET by the output of the operational amplifier A. The temperature characteristics of the mutual conductance of the FET are compensated by setting the temperature characteristics of one of or both resistors R1 and R2. The fluctuation of a drain bias current Idsdc caused by the input signal level and temperature change can be suppressed. Since a gate circuit and a drain circuit are separated, the circuit can be operated in all the A, AB and B classes. Since a voltage drop caused by resistor Rg can be neglected, the design or the like of the resistor Rg regarding the stability of high frequency characteristics preferential is enabled.
申请公布号 JP2001237655(A) 申请公布日期 2001.08.31
申请号 JP20000045312 申请日期 2000.02.23
申请人 JAPAN RADIO CO LTD 发明人 SAKAMOTO HIROTOKU;YODA TAMAKI;TAKAHASHI TAKEHITO
分类号 H03F1/30;H03F3/193;(IPC1-7):H03F3/193 主分类号 H03F1/30
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