发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: To realize a high write throughput by repeating a write verify operation until writing to all memory cells corresponding to a data level of a predetermined number finishes. CONSTITUTION: A write bias is applied to write to a memory cell 1 which stores data of 2 bits per cell. Subsequently, the cell is verified with the use of data of a data hold circuit 6. A corresponding judge circuit 4 is first activated by selecting the memory cell 1 having a write target of a first state. Then, a word line WL of the memory cell is set to a first state verify level, and the verified result of the first state is held into the judge circuit 4 corresponding to the first state write memory cell 1. Connecting a bit line BL to the judge circuit 4 is carried out with the use of data of the data hold circuit 4. When the verified results from the first state through the third state are all obtained, batch judgment is carried out before writing to an insufficiently written memory cell.
申请公布号 KR20010082518(A) 申请公布日期 2001.08.30
申请号 KR20000050653 申请日期 2000.08.30
申请人 HITACHI DEVICE ENGINEERING CO., LTD.;HITACHI, LTD. 发明人 KIMURA KATSUTAKA;KOBAYASHI NAOKI;KOBAYASHI TAKASHI;KUME HITOSHI;KURATA HIDEAKI;SAEKI SHUNICHI
分类号 G11C16/02;G11C11/56;G11C16/04;G11C16/06;G11C16/34;(IPC1-7):G11C16/02 主分类号 G11C16/02
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