发明名称 Synchronization control apparatus and method
摘要 A synchronization control apparatus and method enables synchronization control which can flexibly accommodate various frequencies using a simple circuit construction. A storage device that has a predetermined capacity, such as a FIFO, stores externally input data. A CPU controls an output frequency at which data stored in the storage device are output, based on an average frequency which is an average of the output frequency and on a coefficient for setting the average frequency at a fixed value, the first frequency controlling device calculating the average of the output frequency whenever a timing signal is input in accordance with a predetermined cycle and determining the coefficient depending on a free capacity of the storage device at a time of inputting of the timing signal. The CPU operates if the calculated average frequency continuously exhibits a fixed value for a predetermined time period, to decrease the output frequency when the free capacity of the storage device is larger than a predetermined upper threshold value, while increasing the output frequency when the free capacity of the storage device is smaller than a predetermined lower threshold value. The upper threshold value and the lower threshold value each comprise two different values.
申请公布号 US2001018730(A1) 申请公布日期 2001.08.30
申请号 US20010793909 申请日期 2001.02.28
申请人 YAMAHA CORPORATION 发明人 TOSHITANI MASAFUMI;KOSEKI HITOSHI
分类号 G06F13/38;G06F1/08;G06F5/06;G06F5/14;H03L7/091;H03L7/099;H04L7/00;H04L7/04;H04L13/08;(IPC1-7):G06F12/00 主分类号 G06F13/38
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