发明名称 |
PREVENTION OF VIA POISONING BY GLOW DISCHARGE INDUCED DESORPTION |
摘要 |
A method of fabricating multilevel semiconductor wafers including a spin-on glass planarization layer is described. Prior to sputtering of the interconnect layer and after application of the spin-on glass layers the wafer is exposed to an intense glow discharge in such a way that it is bombarded in at least a partial vacuum with ions and/or electrons and/or photons while at a temperature that is between 400.degree.C and 550.degree.C and that is at least 25.degree.C highe r than the temperature to which the wafer is to be subjected during the subsequent sputtering step. In this way undesirable molecules can be desorbed from the spin-on glass layer so that they do not interfere with the subsequent sputtering step.
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申请公布号 |
CA2032763(C) |
申请公布日期 |
2001.08.21 |
申请号 |
CA19902032763 |
申请日期 |
1990.12.20 |
申请人 |
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发明人 |
OUELLET, LUC |
分类号 |
C23C14/02;H01L21/3105;H01L21/316;(IPC1-7):H01L21/42 |
主分类号 |
C23C14/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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