| 摘要 |
Differential signaling between integrated circuit chips uses fewer than 2 external wires per bit transmitted. Rather than pairing wires into groups of two, the external wires are part of a larger group of 2i+2 wires. Half of the wires in the group are driven low while the other half of the wires are driven high. Since the wires are not paired, adjacent wires can have the same logical state. Differential comparators in the receiver chip compare each wire with all other wires in the group. All outputs of comparators that have a wire as one of its two inputs are input to a majority logic block that evaluates the logical state of the wire. Since half of the wires are in one state, the majority of the remaining wires are in the opposite state of the wire being evaluated. Thus the majority of the comparator outputs indicate the opposite state of the wire being evaluated. Each of the external wires is evaluated by differential comparators and majority logic to get the logical states of each of the external wires. Codes having equal numbers of high and low wires are used to encode binary data over the external wires. Eight external wires can encode a 6-bit binary value, which is 1.5 wires per bit using the (2i+2)-wire codes.
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