| 摘要 |
PURPOSE: A digital signal processor is provided to reduce a size of a program memory and the number of reading instructions by using a matrix expression in a digital processing algorithm so that it reduces an electric power consumption in portable electronics. CONSTITUTION: The device comprises a data storage module, an address generation module, and an operation module. The data storage module stores operand data including circular linked list type matrix data and operation result data. The operation module extracts the data, stored in an address generated by the address generation module, from the data storage module and performs an operation according to an instruction. The address generation module includes a matrix address storage module(22), an A address generation module(14a), a B address generation module(14b), and a C address generation module(14c). The matrix address storage module(22) stores an address of the circular linked list type matrix data, and outputs the first matrix data address, the second matrix data address and an operation result matrix data address. The A address generation module(14a) receives the first matrix data address from the matrix address storage module(22), and sequentially outputs the first operand data address according to the instruction. The B address generation module(14b) receives the second matrix data address from the matrix address storage module(22), and sequentially outputs the second operand data address according to the instruction. The C address generation module(14c) receives the operand result matrix data address from the matrix address storage module(22), and sequentially outputs a storage address of the operation result data according to the instruction.
|
