| 摘要 |
<p>A data I/O system includes first and second function blocks connected to a system bus, which allows the function blocks to communicate with a processor. Each function block includes a D/A converter (22) for outputting an analog signal and a waveform generator (21) that provides a digital signal to the D/A converter. The waveform generator includes a memory control circuit (23) and an address generation circuit (24). The memory control circuit has an address register (32) and a data register (33), both of which are connected to the system bus (16), and a memory (31) connected to the address register and the data register. The address generation circuit (24) is connected to the address register and includes a control register (34), an up-down counter (35), and a comparator (36). The address generation circuit repetitively provides a circulating address signal to the address register. The function blocks relieve the processor of some of its processing load, but do not require additional I/O port addresses of the system. <IMAGE></p> |
