| 发明名称 |
Pad layout and lead layout in semiconductor device |
| 摘要 |
A semiconductor device includes a semiconductor chip and a circuit formed in the semiconductor chip. Pads are arranged in a plurality of rows on the semiconductor chip and electrically connected to the circuit. The pads on adjacent rows are offset from each other. Leads are provided on the semiconductor chip and bonding wires selectively connect the leads to the pads.
|
| 申请公布号 |
US2001013662(A1) |
申请公布日期 |
2001.08.16 |
| 申请号 |
US20010835520 |
申请日期 |
2001.04.17 |
| 申请人 |
KUDOU MANAMI;KOYANAGI MASARU |
发明人 |
KUDOU MANAMI;KOYANAGI MASARU |
| 分类号 |
H01L27/04;H01L21/60;H01L21/822;H01L23/495;H01L23/50;(IPC1-7):H01L23/48;H01L23/52;H01L29/40 |
主分类号 |
H01L27/04 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
|
| 地址 |
|
