| 摘要 |
A memory cell comprises first and second output nodes, a first transistor coupled between a first power supply node and the first output node, a first load coupled between the first output node and a second power supply node, a second load coupled between the first power supply node and the second output node, and a second transistor coupled between the second output node and the second power supply node. A gate terminal of the first transistor is coupled to the second output node, and a gate terminal of the second transistor is coupled to the first output node.
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