| 摘要 |
<p>A process of manufacturing a semiconductor device including a buried channel field effect transistor comprising, for realizing said field effect transistor, steps of forming a stacked arrangement of semiconductor layers on a substrate including an active layer (3), forming a recess in said active layer, referred to as gate recess (A4), for constituting a channel between source and drain electrodes, and forming a submicronic gate electrode (G) which is in contact with the active layer (3) in said gate recess (A4), wherein : the gate recess width (Wri) and the gate length (LGo) are manufactured with predetermined respective values, in order that the access region, defined between the gate (G) and the gate recess edge (31), has an access region width (2Δo), derived from said predetermined values (Wri, LGo), which is sufficiently small to permit the transistor of functioning according to saturation current characteristics having continuous slopes.</p> |
