发明名称 Method and apparatus for balancing current in a system with two sets of termination devices
摘要 A method and devices for a current dump circuit that includes a first termination device, a second termination device, and a current dump device. The first termination device resides outside the die of an IC. One end of the first termination device is operatively connected to a first voltage regulator. Another end of the first termination is device operatively connected to a signal line of the IC. The second termination device resides on a die of the IC. One end of the second termination device is operatively connected to a second voltage regulator. Another end of the second termination device is operatively connected to the signal line of the IC. The current dump device provides a path to remove any current flow between the first voltage regulator and the second voltage regulator.
申请公布号 US6271704(B1) 申请公布日期 2001.08.07
申请号 US19990459854 申请日期 1999.12.14
申请人 INTEL CORPORATION 发明人 BABCOCK SEAN R.;SARANGI ANANDA
分类号 (IPC1-7):H03K5/09 主分类号 (IPC1-7):H03K5/09
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