发明名称 MOS transistor with high-K spacer designed for ultra-large-scale integration
摘要 A MOS transistor having a source and drain extension that are less than 40 nanometers in thickness to minimize the short channel effect. A gate includes a high-K dielectric spacer layer to create depletion regions in the substrate which form the drain and source extensions.
申请公布号 US6271563(B1) 申请公布日期 2001.08.07
申请号 US19980122815 申请日期 1998.07.27
申请人 ADVANCED MICRO DEVICES, INC. 发明人 YU BIN;LIN MING-REN
分类号 H01L21/336;H01L29/423;H01L29/49;(IPC1-7):H01L29/76;H01L29/94;H01L31/062 主分类号 H01L21/336
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