发明名称 VERIFICATION SUPPORTING SYSTEM
摘要 PROBLEM TO BE SOLVED: To realize a verification supporting system in which a coordinative verification between a hardware and a software is made possible while effectively using a high speed property of an FPGA(Field Programmable Gate Array) emulator. SOLUTION: In the verification supporting system carrying out, on the FPGA emulator, a verification of an object logic circuit including a processor, a verifying logic depending on the processor is mapped to an FPGA existing in the FPGA emulator by a circuit description.
申请公布号 JP2001209556(A) 申请公布日期 2001.08.03
申请号 JP20000268615 申请日期 2000.09.05
申请人 YOKOGAWA ELECTRIC CORP 发明人 NATSUI SATOSHI;IKEDA SATORU
分类号 G01R31/28;G06F11/22;G06F11/25;G06F11/28;G06F17/50 主分类号 G01R31/28
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