| 摘要 |
An integrated circuit device is fabricated by forming at least one isolation region in an area of a semiconductor substrate, such as a monolithic semiconductor substrate or a silicon on insulator (SOI) substrate. The at least one isolation region defines at least one active region. A plurality of dummy conductive regions is distributed in the area of the semiconductor substrate, with the dummy conductive regions being constrained to overlie the at least one isolation region. The dummy conductive regions may be formed from a conductive layer that is also used to form, for example, a gate electrode, a capacitor electrode or a wiring pattern. The dummy conductive regions may be formed on an insulation layer, e.g., a gate insulation layer or an interlayer dielectric layer. Preferably, the dummy conductive regions are noncontiguous. In one embodiment, a lattice-shaped isolation region is formed including an array of node regions linked by interconnecting regions and defining an array of dummy active regions. The plurality of dummy conductive regions are formed on the node regions of the lattice-shaped isolation region. In another embodiment, an array of isolation regions is formed, defining a lattice-shaped dummy active region. An array of dummy conductive regions is formed on the array of isolation regions. Related integrated circuit devices are also described.
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