发明名称 |
Method for protecting the edge exclusion of a semiconductor wafer from copper plating through use of an edge exclusion masking layer |
摘要 |
A method for forming a copper interconnect begins by depositing a barrier layer (48) within an in-laid region (18). An edge exclusion protection layer (50) is formed over the barrier layer (48), and this layer (50) is processed so that it only lies within the edge exclusion region (20) of the wafer. The layer (50) is removed from active area portions of the wafer so that contact resistance of copper interconnects is not affected. Wet surface processing is used to form a catalyst (64b) on the wafer surface to enable electroless copper plating within active areas of the wafer to form a copper seed layer (52). The layer (52) is not formed in an edge exclusion region (20). Electroplating is then used to thicken the copper material to form a copper layer (54) over the layer (52) wherein the in-laid copper interconnect is completed.
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申请公布号 |
US6268289(B1) |
申请公布日期 |
2001.07.31 |
申请号 |
US19980080809 |
申请日期 |
1998.05.18 |
申请人 |
MOTOROLA INC. |
发明人 |
CHOWDHURY RINA;JAIN AJAY;ADETUTU OLUBUNMI |
分类号 |
H01L21/288;H01L21/768;(IPC1-7):H01L21/44 |
主分类号 |
H01L21/288 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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