发明名称 |
DRAM DATA STORAGE AND MOVEMENT FOR NETWORK PROCESSORS |
摘要 |
PURPOSE: A DRAM data storage and a movement method for network processors are provided to improve the capacity of a network processor for moving data to a dynamic random access memory(DRAM) chip. CONSTITUTION: Double data rate DRAMs are used in order to double band width in accordance with the throughput of increased data. The movement of data is further improved by setting up complete reading of four banks and complete writing of four banks by a network processor in each repeat of a DRAM time clock. A scheme for reading and writing accesses randomized by the network processor is discloses. The scheme can be applied especially to a network such as the Ethernet(R) using various frame sizes.
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申请公布号 |
KR20010070356(A) |
申请公布日期 |
2001.07.25 |
申请号 |
KR20000082481 |
申请日期 |
2000.12.27 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION. |
发明人 |
BASS BRIAN MITCHELL;CALVIGNAC JEAN LOUIS;HEDDES MARCO C.;JENKINS STEVEN KENNETH;MICHAEL RAYMOND TROMBLAY;SIEGEL MICHAEL STEVEN;VERPLANKEN FABRICE JEAN |
分类号 |
G06F12/06;G06F12/00;G06F12/02;G06F13/16;G06F15/167;G11C11/407;H04L12/56;(IPC1-7):G06F13/00 |
主分类号 |
G06F12/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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