发明名称 |
METHOD FOR STORING FUNCTION CONFIGURATION DATA AND INTEGRATED CIRCUIT USING THE METHOD |
摘要 |
PROBLEM TO BE SOLVED: To provide a programmable hardware unit where a memory area is reduced and reconfiguration of functions of logic function is facilitated by solving a problem of a conventional integrated circuit that can configure a logical function in which a huge memory area has been required to store logic function configuration data for realization of logical functions or reconfiguration of the logical function has been difficult. SOLUTION: In a variable function section configured with neuron MOS transistors(TRs), controlling a charge quality stored in a capacitor placed between a floating gate of the neuron MOS TR and an input terminal and a potential of the floating gate at the storage of the charge quantity stores function configuration data received from the input terminal.
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申请公布号 |
JP2001196920(A) |
申请公布日期 |
2001.07.19 |
申请号 |
JP20000005942 |
申请日期 |
2000.01.07 |
申请人 |
NIPPON TELEGR & TELEPH CORP <NTT> |
发明人 |
AOYAMA KAZUO;SAWADA HIROSHI;NAGOYA AKIRA;SHIBATA SUNAO;NAKAJIMA KAZUO |
分类号 |
G06F15/18;G06N3/063;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;H03K19/0944;H03K19/173;H03K19/20;(IPC1-7):H03K19/173;H01L21/824 |
主分类号 |
G06F15/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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