发明名称 METHOD FOR MANUFACTURING OVERLAY IN PROCESS FOR MANUFACTURING SEMICONDUCTOR
摘要 PURPOSE: A method for manufacturing an overlay in a process for manufacturing a semiconductor is provided to sufficiently guarantee an overlay margin when a pattern is formed regarding a next layer and an overlay is performed, by measuring an overlay parameter, and by precisely measuring an overlay between respective shots. CONSTITUTION: An exposure process is performed regarding the first and second overlay marks(10,20) formed on a reticle(100) to form the first and second overlay patterns on a wafer. The second overlay pattern formed on the wafer and the first overlay mark on the reticle are overlapped to form the first and second overlay patterns. Whether a pattern is left in a portion where the second overlay pattern overlaps the first overlay mark on the reticle, is determined. If the pattern is not left, the overlay is determined to normally perform a measurement so that the process for determining whether the pattern is left in the overlapped portion of the second overlayer pattern and the first overlay mark is repeated. If the pattern is left, a critical dimension regarding the residual pattern is measured to correct the overlay state.
申请公布号 KR20010066287(A) 申请公布日期 2001.07.11
申请号 KR19990067886 申请日期 1999.12.31
申请人 ANAM SEMICONDUCTOR., LTD. 发明人 HWANG, TAE UNG
分类号 H01L21/66;(IPC1-7):H01L21/66 主分类号 H01L21/66
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