发明名称 High density flash memories with high capacitive-couping ratio and high speed operation
摘要 The device includes a gate oxide formed on a semiconductor substrate. Oxide regions are respectively formed on the substrate and adjacent to the gate oxide. Textured oxides are formed on the substrate, between the gate oxide and the oxide regions. A floating gate consists of a first polysilicon portion, second polysilicon portions and a third portion that is composed of hemisperical grained silicon (HSG-Si). The first polysilicon portion is formed on the gate oxide. Isolations are formed on the side walls of the first polysilicon portion. The second polysilicon portions are respectively formed next to the isolations and over a portion of the oxide regions. The HSG-Si is formed on the upper surface of the first polysilicon portion and the second polysilicon portions. A dielectric layer is formed on the HSG-Si of the floating gate. A control gate is formed on the dielectric layer. The doped regions are formed in the substrate and under the textured oxides and the oxide regions.
申请公布号 US6259130(B1) 申请公布日期 2001.07.10
申请号 US19990265062 申请日期 1999.03.09
申请人 TEXAS INSTRUMENTS - ACER INCORPORATED 发明人 WU SHYE-LIN
分类号 H01L21/28;H01L21/336;H01L29/51;(IPC1-7):H01L26/76 主分类号 H01L21/28
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