| 摘要 |
A parallel processing unit employs a small-scale instruction issuer and achieves a high-speed operation. The parallel processing unit has an instruction issuer for issuing instructions with source data to processors, a data holder for holding the source data, and a data state holder for holding the state of data that is required by the instruction issuer. Resultant data from the processors are sent to the instruction issuer through a data forwarder when the resultant data are sent to the data holder. The resultant data serve as the source data. The data state holder holds an address of the data holder where a piece of resultant data is stored, as well as a processor number that is related to the address and specifies one of the processors that provides the resultant data. The instruction issuer refers to the processor number when fetching, as source data, data transmitted through the data forwarder. |
