发明名称 Causality-based memory access ordering in a multiprocessing environment
摘要 Causality-based memory ordering in a multiprocessing environment. A disclosed embodiment includes a plurality of processors and arbitration logic coupled to the plurality of processors. The processors and arbitration logic maintain processor consistency yet allow stores generated in a first order by any two or more of the processors to be observed consistent with a different order of stores by at least one of the other processors. Causality monitoring logic coupled to the arbitration logic monitors any causal relationships with respect to observed stores.
申请公布号 AU2750701(A) 申请公布日期 2001.07.09
申请号 AU20010027507 申请日期 2000.11.03
申请人 INTEL CORPORATION 发明人 DEBORAH T. MARR
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
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