发明名称 ISOLATION METHOD OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: An isolation method of semiconductor device is provided to prevent a void and junction lines, and increase crisscross ratio. CONSTITUTION: A pad oxide layer(12) and a silicon nitride layer(13) are formed on a silicon substrate(11). Patterning the pad oxide layer(12) and a silicon nitride layer(13) makes a trench to expose an isolation-prearranged region of the substrate(11). The first oxide layer covers the sidewall and flat region of the trench. The fourth group element such as C or Si is inserted into the first oxide layer. The second oxide layer, APCVD(Atmospheric Pressure Chemical Vapor Deposition) O3-TEOS(Tetra Ethyl Ortho Silicate) USG layer, fills the trench. The silicon nitride layer(13) is exposed and polished, and an isolation layer is built by reclaiming the trench using the first and the second oxide layer. The remaining silicon nitride layer(13) and the pad oxide layer(12) are removed.
申请公布号 KR20010063262(A) 申请公布日期 2001.07.09
申请号 KR19990060292 申请日期 1999.12.22
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, YEON SU;LEE, DONG HO
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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