发明名称 |
METHOD FOR CREATING SEQUENCE CIRCUIT THROUGH COMPARING TRUTH VALUE |
摘要 |
PURPOSE: A method for creating a sequence circuit through comparing truth value is provided to apply to an asynchronous circuit design not using a main clock by setting a flip-flop to be used and comparing a truth value by supposing a terminal to be matched to a signal in accordance with a wave form operation order and embodying a logic equation of the supposed terminal in an asynchronous circuit being mixed by a level input and a pulse input. CONSTITUTION: An input signal out of a wave form of an asynchronous circuit being mixed by a level input and a pulse input is divided into a level signal and a pulse signal, and one clock signal is set(100). A flip-flop to be applied is set in an application scheduled design rule, and an initialization signal capable of avoiding a previous status or an unknown status is added by setting a terminal having the same condition as a received input(120). An operation order is set by sectioning a wave form of a sequence circuit and a truth value table is prepared(140). A truth value comparing table is created by comparing a row of the truth value table in accordance with the operation order with a row of the truth value table of the set flip-flop(160). A "1" and "0" rows out of a plurality of terminal rows which are not decided in a receiving of input signal out of the flip-flop terminals are decided(180). A circuit is embodied by calculating a circuit equation for a final assignment terminal decision(200).
|
申请公布号 |
KR20010063188(A) |
申请公布日期 |
2001.07.09 |
申请号 |
KR19990060176 |
申请日期 |
1999.12.22 |
申请人 |
KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
KIM, DAE YONG;KWAK, MYEONG SIN;LEE, CHEON HUI;LIM, TAE YEONG |
分类号 |
G06F17/50;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|