METHOD FOR MANUFACTURING ANTI FUSE OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for manufacturing an anti-fuse of a semiconductor device is provided to reduce an area of a circuit for generating a high voltage, by sharpening the surface of a dielectric layer formed on a conductive layer used as a storage electrode of the anti-fuse to perform a repair process at a low voltage. CONSTITUTION: The first planarization layer pattern having a contact hole exposing a portion to which a lower electrode of an anti-fuse is connected, is formed on a semiconductor substrate(11). The first conductive layer(17) not burying the contact hole is formed on the entire surface. A photoresist layer pattern exposing a portion to which an upper electrode of the anti-fuse is connected, is formed on the second planarization layer(21). The second planarization layer is etched by using the photoresist layer pattern as an etching mask while an over-etching process is performed to sharpen the surface of the first conductive layer.