| 摘要 |
PURPOSE: A flash memory device is provided to accumulate every charge through a metal interconnection and a control gate by forming a strapping line composed of a metal interconnection or polysilicon by a strapping layout connecting the strapping line with a cell array. CONSTITUTION: A stack gate structure composed of a tunnel oxide layer(202), a floating gate(203), a dielectric layer(204) and a control gate(205) is formed in a selected region on a semiconductor substrate(201). A junction part(206) is formed in a predetermined region of the semiconductor substrate by an impurity ion implantation process. A predetermined region of the first insulating layer(207) is etched to form a contact hole(208) exposing the control gate and the junction part. A conductive layer is buried in the contact hole to form a plug, and the first metal interconnection(209) in contact with the plug in the contact hole is formed. A predetermined region of the second insulating layer(210) formed on the entire structure is etched to form a via hole(211) exposing the first metal interconnection. A conductive layer is buried in the via hole to form a plug, and the second metal interconnection(212) in contact with the plug is formed. The first metal interconnection functions as a strapping line.
|
