| 摘要 |
PURPOSE: A ferroelectric memory device having a ferroelectric capacitor positioned on the upper portion of a broad active area is provided to very exactly prevent the difference of a voltage between both ends of the ferroelectric capacitor from being generated and simultaneously minimize the difference generated by the ferroelectric capacitor. CONSTITUTION: The ferroelectric memory device includes the first switching transistor, a ferroelectric capacitor, and the second switching transistor. The gate of the first switching transistor is connected to a positive word line(WL) and the source-drain path of that is connected between a bit line and a first node. The ferroelectric capacitor is connected between the first node and a plate line(PL) and formed on the upper portion of the active area. The gate of the second switching transistor is connected to a negative word line(/WL) and the source-drain path of that is connected between a bit line and a first node. The second node is formed on the active area between two negative word lines of an adjacent cell. The source of the second switching transistor and the plate line are contacted to the second node.
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